2 N5980A 3.125 Gb/s Serial BERT Data Sheet
System Specifications
Data rate
The same data rate applies for pattern generator
electrical out and optical out, and for error detector
electrical in and optical in.
Data rates
Fast Ethernet 125 Mb/s
OC-3 155.52 Mb/s
OC-12 622.08 Mb/s
OC-48 2.48832 Gb/s
OC-48 with FEC 2.66606 Gb/s
1 x FC 1.0625 Gb/s
2 x FC 2.125 Gb/s
1 x Gigabit Ethernet 1.25 Gb/s
XAUI 3.125 Gb/s
Accuracy ± 50 ppm
Operating system
The software supplied runs on Windows 2000 or XP
with .NET v2.0, by a USB 2.0 interface.
Out/Out
Output type differential, AC-coupled,
external 100 Ω
differential termination
Amplitude, selectable
ECL: 850 mV
pp
typ., single-ended
1700 mV
pp
typ., differential
LVDS: 400 mV
pp
typ., single-ended
800 mV
pp
typ., differential
Jitter peak-peak 0.05 UI typ. @ OC-12
0.08 UI typ. @ GbE
0.15 UI typ. @ OC-48
Connector SMA, front panel
Pattern generator optical out
A standard SFP housing is provided. Minimum num-
ber of insertion/deinsertion cycles: 200.
Trigger output
A single-ended, electrical output is provided on the
front-panel.
Trigger out
Output type single-ended
Impedance 50 Ω nominal, AC-coupled
Amplitude 850 mV typ.
Clock rate, selectable divided by n, n=2,4,8,10,16,20
data rate
Connector SMA, front Panel
In/In
Input type differential, AC-coupled
Max. input amplitude 1 V
pp
, single-ended
2 V
pp
, differential
Impedance 100 Ω nominal
Sensitivity < 50 mV
Clocking mode internal CDR
Synchronization automatically on level, polarity,
phase, bit and pattern
Connector SMA, front panel
Figure 1: User interface-advanced mode
Error Detector
A differential electrical input is provided on the front-
panel. Data rate is the same as pattern generator.
Pattern
The following patterns are supported:
PRBS: 2
7
-1, 2
15
-1, 2
23
-1, 2
31
-1.
Pattern Generator
Pattern
The following patterns are supported:
PRBS: 2
7
-1, 2
15
-1, 2
23
-1, 2
31
-1.
Data pattern: K28.5.
Clock pattern: data rate divide by n, n=2,4,8,10,16,20
The pattern can be individually adjusted for pattern
generator electrical out and optical out.
Error injection
Fixed electrical and optical error inject: Fixed error
ratios of 1 error in 10
n
bits, n=3,4,5,6,7,8,9.
Single error injection. Separate error ratios can
be adjusted for pattern generator electrical out and
optical out.
Pattern generator electrical out
A differential electrical output is provided on the
front-panel.
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