Agilent Technologies U7242A Manual de usuario

SuperSpeed USB 3.0 Technology Overview and Industry UpdateJim ChoateUSB Product ManagerAgilent TechnologiesPage 1

USB-IF Still Provides USB 3.0 Certification at Intel PIL – Focus is on Hosts and Hubs•PIL still performing testing between USBIF workshops•Test lab ex

U7243A USB 3.0 TX Compliance ApplicationPage 11

Transmitter test requirements(TX Far End)Page 12

USB 3.0 Signal Path FlowEQ+-ConnectorChannelConnectorEQ+-TP1TxpTxn RxnRxpTx RxSignal generated hereExits IC hereExits board hereCombine measurements a

S-ParametersPlot showing S21 Insertion LossPage 14

Tx testing emulated through s-parametersEmbed Channel File“DEVICE_3MCABLE.s4p”Validation with InfiniiSim of DSA91304APage 15

Compliance Channels•Compliance Channels are used to test TX and RX for worst case channel conditions•Back panel USB route solution•Channel loss will d

Transmitter TestsTX tests:•LFPS (Near end)•SSC (Near end)•TX (Far End: TP1)•Eye Pattern•Tj, Dj (CP0 Pattern•Rj (CP1 Pattern)•Amplitude“Embedded channe

LFPS Test RequirementsPage 18

PING LFPSToggles CMMCP0DjCP1RjTX Testing Requirements: Polling.LFPS to compliance modePage 19

 Introduction USB 3.0 Industry Overview Physical Layer Overview Physical Layer Testing Cable and Connector Testing Compliance Test Challenges T

Toggling USB 3.0 TX test modes•Connect Aux Out to DUT SSRX+ to toggle test modesPage 20

Transmitter testing uses embedded compliance channelSSC failures are a challengePage 21

Cable Test FixturesOfficial Fixtures for testing cable assemblies and connectors are required.Below is a set of fixtures for USB 3.0 cable assemblies

USB 3.0 Cable-Connector Compliance Test MOIusing Agilent 86100C/D DCA Mainframe and 54754A TDR/TDT Module• Step-by-Step Method of Implementation (MOI)

ENA option TDR is used by all USB-IF certified test centers to perform USB 3.0 connectors and cable assemblies compliance testsUSB 3.0 Cable/Connector

SSC is one of biggest challenges for USB 3.0• Spread spectrum clocking is the intentional down-spreading of the transmitter’s output data rate.-300ppm

SuperSpeed Receiver TestsRx Compliance and Jitter Tolerance TestingPage 26

Turn on loopback by sending LFPS and required training sequencesThe receiver stress pattern is BDAT with SKPs inserted as described in the standard.Th

SuperSpeed Host Receiver Test Calibration and compliance channelHost Channel setupPage 28

Device Channel setupSuperSpeed Device Receiver Test Calibration and compliance channelPage 29

USB Implementors Forum, inc (USB-IF)USBIF Board MembersIntel, NEC, HP, Microsoft, ST-Ericsson, LSIAgilent Active MembershipMarketing WGDeviceWGCabConW

Fixtures and cables available from the USBIF at:http://www.usb.org/developers/estoreinfo/Page 30

SuperSpeed Receiver Test Calibration and compliance channelsPage 31

Typical SuperSpeed Link Turn-on SequencePage 32

Standard Loopback Entry Sequence If a DUT under test does not enter loopback with this sequence it is technically a failure.Page 33

Host and Hub Drop/Droop testing• Un-configured power is now 150mA• High power devices can draw up to 900mA• A new Drop-Droop fixture is available from

Host Droop Test ResultPage 35

USB 3.0 Protocol Decode: on scopePage 36

Additional USB 3.0 Protocol Capabilities•Search and trigger•Views: Details, Payload, HeaderPage 37

TX Compliance Pitfalls•SSC modulation•SSC deviation•High Rj (flicker Jitter)•Poor de-emphasis•Cause eye failure at end of channelPage 38

RX Compliance Pitfalls•Loopback issues• Dut needs custom sequence• DUT drops out easily•Calibration issues• Inconsistent• Poor Sj/Rj mod•SSC deviation

Product DevelopmentInitial DeploymentBroad DeploymentSuperSpeed USB Timeline2010Compliance Program/Industry Enabling DevelopmentUSB 3.0 Electrical Com

Don’t forget USB 2.0 Compliance PitfallsFailure to properly support USB suspend• Low power state required of all devices– < 2.5mA (spec says 500uA

Compliance Pitfalls – RX Test•Misinterpretation of RX sensitivity and Squelch requirements has caused considerable confusion and discrepancy in test r

Transmitter Characterization(PHY/TSG/OOB)DSAX93204A oscilloscopeU7243A USB 3.0 and N5416A USB 2.0N8805A USB 3.0 Protocol viewer softwareReceiver Jit

Intel and AMD announce USB 3.0 ChipsetsIntel Will Add Both USB 3.0 and Thunderbolt To Ivy BridgeApril 15, 2011http://www.newsfactor.com/news/Intel-Ado

What is Thunderbolt?• Source: Wikipediahttp://en.wikipedia.org/wiki/Thunderbolt_(interface)• Connector is Mini DP• Host side interface x4 PCIeand DP•

De-embedding and Precision Probe At 5Gbps and above removing probing effects is key Typical de-embedding requires accurate s-parameters Challenge o

Save time: Two options for characterization before PrecisionProbeOption 1: Six steps (you would need to do the following)Option 2: Ignore the cable lo

PrecisionProbe and Cable (N2809A) Characterize and correct any input path to your oscilloscope input using only your oscilloscope

The Problem: Measurement Repeatability Issues that make the problem worse1. Cables and channels are lossy2. Probe characteristics are different from p

The Solution: PrecisionProbePrecisionProbe Quickly and Easily: - Characterizes and corrects the frequency response (Vout/Vin) of phase of any probe an

SuperSpeed USB 3.0 Key Messages SuperSpeed USB is in the broad adoption phase! Over 230 Certified SuperSpeed USB 3.0 Products 10 host Silicon, 8 IP

Probes: Key TermsVinThe signal at the probe point before the probe is connected or the signal at the probe point if an ideal probe were connected Vsrc

Cables: The resultResponse of cable with no correctionCorrected cable responseApplied corrected filter

The real time eyeResults: More margins!20% less jitter33% more eye heightSlightly wider eye

Summary: PrecisionProbe helps with the following:1. Cables and channels are lossy2. Probe characteristics are different from probe to probe3. Switch p

SummaryUSB 3.0 is now in broad adoption phaseTools for full TX/RX and channel characterization ready nowInfiniiSim “compliance channel” emulation w

Additional references and links• Agilent Digital Test Solutions: http://agilent.eetimes.com/index.html• USB Implementers Forum, Inc. http://www.usb.or

Additional InformationGo to www.usb.org to get additional information on certifying your USB productsFor specific updates to compliance requirements g

Worldwide shipment of USB-enabled DevicesPage 6 USB install base is 10+ billion and growing at 3+ billion a year.

USB 3.0 Physical Layer Test Challenges•USB 2.0 High-Speed 480Mbps NRZI, Half Duplex 4 signals Dp, Dm, VCC, GND Cable Lmax= 5meter IconfigLP/FP= 1

0.9 Draft, USB 3.0 PHY Electrical Test SpecificationKey Updates RX compliance calibration and testing performed at end of the channel Channel defin

USB 3.0 Compliance Test MatrixUSBIF source at http://www.usb.org/developers/ssusb/ssusb_pil/USB_3_0_Test_Matrix.pdfPage 9