
15
Specifications (continued)
External TTL input
< 1.1 V
> 1.9 V
35 ns
80 ns
11 μs ± 2 μs
Performance
1.47 Msps
0 s < Sweep time < 0.15 s
0 s < Offset time < 0.15 s
Note: Sweep time + Offset time < 0.15 s
±1 μs
U2000/1/2A: –25 dBm to +20 dBm
U2000/1/2H: –15 dBm to +30 dBm
U2000/1B: +5 dBm to +44 dBm
10 ms/reading
Parameter
Trigger low
Trigger high
Minimum pulse width
Maximum repetition period
Latency
Parameter
Sampling rate
Sweep and Offset
Resolution
Power
Measurement speed
2
1. Not applicable for the U2004A model
2. At conditions: Gate sweep time 2 ms; Gate sweep time + Gate offset < 2.3 ms; FAST mode
Trigger
Gate
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