Agilent Technologies U7242A Manual de usuario Pagina 3

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Signal Integrity
June 2010
Challenges In Digital Design Today
Higher Data Rates Are Causing Signal
Integrity (SI) Problems:
Need to include high-frequency effects like
interconnects in simulation and layout
Need high quality probes and fixtures
Need to minimize jitter
FPGAs Are Commonplace:
Can’t use a Reference Design without some
analysis
Harder to simulate the overall performance
Need to characterize the I/O buffers
Standards Evolve Every 2-3 Years:
Leveraging existing designs gets harder
Measurement requirements get tighter
Need to buy new equipment each time
2.5 Gb/s
5 Gb/s
8 Gb/s
2003
2008
2006
2011
2009
2014
PCI Express
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