Agilent Technologies HP 8642A/B Especificaciones Pagina 392
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I Phase Lock Loop Bandwidth
vs.
Peak Tuning Range
N
X
~o
5
~U
c
n
CO
i
i
Q_
1M
100k
10k
1k
100
10
-
-
-
-
-
-
■■/
i
i
i
i
°y>
i
J
^
//
J
i
//
>
/
i
i
■/
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i
7
/
1
1
1
1
A—
1
f
-
"1
I I I I I r
J
l ! I 1 I I l I I
T"!
! I I I I I I I I I I I
,1
1 10 100 1k 10k 100k 1M 10M 100M 1G
Peak Tuning Range
(Hz)
* Lag/Lead Filter Number
Description
This graph illustrates
the
closed Phase Lock Loop Bandwidth
(PLL BW)
chosen
by the
system
as a
function
of the
Peak Tuning Range
of the
source. Knowing
the
approximate closed PLL BW allows
you to
verify that
there
is
sufficient bandwidth
on the
tuning port
and
that sufficient source
isolation
is
present
to
prevent injection locking. (Refer
to
Instr. Params
in
Chapter
2,
Measurement Definitions,
for a
description
of the
Peak Tuning
Range requirements.)
7-26 Quick Reference
- Software 3
- Versions 3
- Volume 1 Contents 4
- Chapter 4, Computed Outputs 5
- Volume 2 Contents 6
- Chapter 7, Quick Reference 7
- Chapter 8, Messages 7
- Index 3 10
- 4 Index 11
- Index 5 12
- 6 Index 13
- Index 7 14
- 8 Index 15
- 10 Index 17
- Index 10.1 18
- Index 13 21
- 14 index 22
- Freq, 3-4 23
- 16 Index reu.05SEP89 24
- Index 17 25
- Softkey Index 26
- 2 Softkey Index 27
- Int. Adj'mnt 28
- Test Ail 28
- General Information 46
- HP 3048A Description 47
- Genera! Information 1-3 48
- Documentation Updating 49
- Software Updating 50
- New Software Releases 51
- Software Status Bulletin 51
- Software Release Bulletin 51
- Documentation Updates 51
- Guide to System Flexibility 52
- HP 3048A System Options 53
- Desktop Computers 54
- Computer Accessories 54
- Disc Drives 55
- Spectrum Analyzers 55
- Printers/Plotters 55
- General Information 1-11 56
- HP 3048A 57
- Specifications 57
- Spurious Responses (dBnil 59
- ^\J 1 1 59
- * HP 8663A Option 003 only 62
- :hp!P 3B4aW Ca 62
- Amplitude 63
- Modulation 63
- Specified only with FM off 64
- Specification 65
- " s^ 65
- * HP 8642B only 67
- HP8642Boniy 68
- Measurement Definitions 71
- Type/Range 72
- Measurement Type 73
- Type/Range 2-5 74
- 2-6 Type/Range 75
- AM Noise Measurements 76
- Baseband Measurements 77
- 2-10 Type/Range 79
- 5 0 Oh*! 80
- Averages 81
- Instr. Params 82
- Frequency Parameters 83
- Instr. Params: $N w/PLL 2-15 84
- VCO Tune Port Parameters 85
- The Peak Tuning Range 87
- Instr. Params: $N w/PLL 2-19 88
- Noise Floor Level 89
- Instr. Params: $N w/PLL 2-21 90
- Phase Lock Loop Bandwidth 91
- £(f) [dBc/Hz] vs. f[Hz] 92
- VCO Tuning Linearity 93
- Instr. Params: $N w/PLL 2-25 94
- 2-26 Instr. Params: $N w/PLL 97
- Instr. Params: $N w/PLL 2-29 98
- 2-30 Instr. Params: $N w/PLL 99
- Define Msrmnt 100
- Detector Selection 102
- External Detectors 103
- AM Noise 107
- AM Detector Considerations 109
- Calibr Process 110
- Introduction 110
- The Phase Detector Constant 112
- Parameter Entry Descriptions 113
- ->r-> 114
- -t-Jy— 114
- .1V/div 115
- 1 E - 6 X T>„ 119
- VCO Tuning Constant 121
- Description 123
- information about the 124
- 3 _4'"i fl:[B-: 126
- Entering a Detector Constant 128
- Constant 129
- +/- DC Peak Method 131
- <-60 oBc 137
- Spur Method 139
- <:-60 dec 141
- Define Msrrnnt 144
- L Port Signal Level 147
- -i_n_n_r 150
- Constant Calibration Method 151
- J<& 154
- Calibration Method 155
- Deviation Method 156
- Diode Detector Voltage {Vdc) 159
- Source Control 171
- Lock Loop Measurement 174
- PHASE LOCK LOOP 175
- Place DUTs 176
- Discriminator Measurement 180
- DC Block: 182
- Define Graph 184
- the results in dBc 186
- 2-118 Define Graph 187
- Define Graph 2-118.1 188
- Define Graph 2-119 189
- Test Files 190
- System Preset 191
- 2-122 Test Files 191
- Softkey Descriptions 192
- How to Manage the Test Files 194
- Loading a Test File 195
- Creating a Directory 195
- Graphics Functions 197
- !D HWn Mk' 198
- Param Summary 3-5 200
- 3-6 Param Summary 201
- Param Summary 3-7 202
- 3-8 Param Summary 203
- Param Summary 3-9 204
- Param Summary 3-11 206
- 3-12 Param Summary 207
- Access Graph 208
- Update Dir 210
- Result Files 3-14.1 210
- Result Files 3-15 211
- Storing a Result File 212
- Loading a Result File 213
- Define Graph 3-20.1 217
- Define Graph 3-21 218
- Marker ON/OFF 219
- Slope Lines 221
- How to Create Slope Lines 223
- How to Label Slope Lines 223
- Plotters 224
- Plot w/o Spurs 225
- K^> 227
- Computed Outputs 228
- Integr Noise 229
- df (without units) 230
- 4-8 Integr Noise 234
- Sigma vs. Tau 235
- (f) = ^S*(/) 238
- Normalized Bandwidth 240
- Bandwidth 241
- 3 Osc. Compar 243
- Measurement Uncertainty 244
- Function 246
- Compar 247
- 4-26 2 Osc. Compar 250
- Spur List 251
- Jitter 4-29 253
- Time domain Phase Jitter 254
- radians 254
- Time Jitter 255
- Time Domain 255
- Scale Data 256
- Shift Data 257
- Input Power at Amplifier 258
- Special Functions 260
- Test Mode 261
- Funct'n 261
- Phase Lock Loop Suppression 263
- PLL Suppression Parameters 263
- 5-6 Test Mode 264
- Test Mode 5-7 265
- Ignore Out Of Lock Mode 266
- Funct'n 267
- Carrier Type 5-11 269
- FFT Segmnts 270
- Minimum Averaging 272
- Time Record Length 274
- the FFT 275
- Segment Table 275
- Decreasing Measurement Time 276
- Measuring 276
- Offsets 276
- FFT Segmnts 5-21 277
- 5-22 FFT Segmnts 278
- The Default Table Values 280
- RF Segmnts 5-25 281
- Video Bandwidth 282
- Sweep Time 283
- Funct'n 284
- How to Use Noise Monitor 287
- For a Continuous Display 288
- AVG OFF NEXT TRACE 289
- FORMAT SINGLE 289
- 11848A Control 290
- Control 292
- Moving the Cursor 294
- Entering Field Values 294
- Manipulating Rotary Switches 294
- Sending Commands 295
- The Clear Functions 295
- Z\ >^-Q 296
- ?"?"" 299
- 3048A Sys Chk 300
- The Calibration Routines 302
- Clearing Caldata 303
- System Configuration 305
- RF Sources 307
- Considerations When Choosing 310
- RF Source 310
- 6-8 RF Sources 311
- W OUT ■ 312
- IN RF OUT " 312
- / Tune 313
- DCFM Voltage 313
- Ref. Tine Down 313
- Source Elase Conver i 313
- F»F OUT • 314
- RF Sources 6 316
- """ 317
- HP 8642A Performance 319
- ■ MP 8B42B DHSy 319
- Tuning the HP 8642A/B 320
- HP 8656B Performance 321
- I I I I 322
- HP 11729C Performance 323
- RF Sources 6-21 324
- System Config 325
- RF Analyzers 6-25 328
- Plotted Range 329
- Measurement Range 329
- 6-28 RF Analyzers 331
- RF Analyzers 6-29 332
- Down Converters 333
- 11729C Specs 335
- 6-34 Down Converters 336
- Specified Noise 337
- r T"' T 11 338
- DC FM vs. EFC or 10 MHz A/B 339
- 1 1729C 340
- "1 341
- 6-40 Down Converters 342
- "c 343
- F?F OUT ■ 344
- Down Converters 6-43 345
- Counter 347
- Digital Voltmeters 6-47 348
- Controllers 350
- 't 352
- Manage Caidata the 354
- Mass Storage Devices 6-53 354
- Plotter 355
- Plotter 6-57 357
- 358
- How to Set the System Clock 359
- Additional Equipment 362
- Amplifiers 363
- Phase Shifter 363
- 0° Power Splitters 363
- Couplers 363
- DC Blocks 363
- Printers 364
- "V 366
- Quick Reference 367
- ../■■■\i—'..r-\! 371
- £(f) [dBc/Hz] vs. f [Hz] 372
- MEASUREMENT 373
- MEASUREMENT RESULT 375
- X(f) [dBc/Hz] vs. f [Hz] 376
- '] T 377
- Diode Detector Voltage (Vdc) 378
- :e - .5 385
- 'AMPU 387
- 100K 1M 10M 40M 388
- II II I 1 II II II II IS ! 1 390
- "TT 391
- ■SmiMPU 393
- TUNE PORT 393
- KHZ PTR 395
- Quick Reference 7-29 395
- Messages 396
- T A p T : a H _■ - 1 398
- * Lag/Lead Filter Number 399
- tnan tn 400
- -t-> 403
- > "□ 407
- > TJ 408
- - + - / 409
- > T3 410
- Action: 411
- New Msrmnt 414
- The LNA 420
- Proceed Theor 422
- II II II II II II II 423
- ■*-> 426
- Is Assumed to be 427
- Appropriate for the 427
- Phase Detector 427
- Index 1 437
- 2 Index 438
- 12 Index 448
- 14 Index 450
- 16 Index rev.05SEP89 452
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