Agilent Technologies 42A Especificaciones descargar pdf (Pagina 91)

Chapter 3: Testing Performance

To Test the Single-clock, Multiple-edge, State Acquisition

Verify the test signal

1 Check the clock interval. Using the oscilloscope, verify that the master-to-

master clock time is 5.000 ns, +0 ps or -100 ps.

a Turn on the pulse generator channel 1, channel 2, and trigger outputs.

b In the oscilloscope Timebase menu, select Scale: 2.000 ns/div.

c In the oscilloscope Timebase menu, select Position. Using the

oscilloscope knob, position the clock waveform so that a rising edge

appears at the left of the display.

d On the oscilloscope, select [Shift] + width: channel 2, then select

[Enter] to display the master-to-master clock time (+ width(2)). If the

positive-going pulse width is more than 5.000 ns, go to step e. If the

positive-going pulse width is less than or equal to 5.000 ns but greater

than 4.900 ns, go to step 2.

e On the oscilloscope, select [Shift] - width: channel 2, then select [Enter]

(- width(2)). If the negative pulse width is less than or equal to 5.000 ns

but greater than 4.900 ns, go to step 2.

f Decrease the pulse generator Period in 10-ps increments until the

oscilloscope + width (2) or - width (2) read less than or equal to 5.000

ns, but greater than 4.900 ns.

Clock

Data Signal

Clock Signal

Interval

1 2 ... 86 87 88 89 90 91 92 93 94 95 96 ... 167 168

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Agilent Technologies 42A Especificaciones Pagina 91